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System Level Simulations
Seppo Virtanen, Dragos Truscan, Sanna Määttä, Tomi Westerlund, Jouni Isoaho, Jari Nurmi, System Level Simulations. In: Jari Nurmi (Ed.), Processor Design - System-On-Chip Computing for ASICs and FPGAs, 405–426, Springer, 2007.
BibTeX entry:
@INBOOK{cViTrMaWeIsNu07a,
title = {System Level Simulations},
booktitle = {Processor Design - System-On-Chip Computing for ASICs and FPGAs},
author = {Virtanen, Seppo and Truscan, Dragos and Määttä, Sanna and Westerlund, Tomi and Isoaho, Jouni and Nurmi, Jari},
editor = {Nurmi, Jari},
publisher = {Springer},
pages = {405–426},
year = {2007},
}
Belongs to TUCS Research Unit(s): Embedded Systems Laboratory (ESLAB), Communication Systems (ComSys)
Publication Forum rating of this publication: level 2