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Memory Analysis of Low Power MPEG-4 Decoder Architecture

Andreas Dahlin, Johan Ersfolk, Haitham Habli, Johan Lilius, Memory Analysis of Low Power MPEG-4 Decoder Architecture. In: 6th IEEE International Conference on Embedded Systems and Software, ICESS'09, 2009.

Abstract:

Recent research has shown that in mobile devices, energy efficiency of the total system does not scale at the same pace with the energy efficiency of the silicon. The reason has been attributed to overheads in software, and in the context of multi-media codecs a new approach has been proposed. In this approach hardware accelerators are scheduled quasi-statically thus decreasing the interfacing overhead substantially. The validation of the approach has been done by restructuring the open-source Xvid codec software implementation. In this paper we analyze the approach for its memory requirements, and propose some optimizations that will substantially decrease the memory bandwidth of the approach.

BibTeX entry:

@INPROCEEDINGS{inpDaErHaLi09a,
  title = {Memory Analysis of Low Power MPEG-4 Decoder Architecture},
  booktitle = {6th IEEE International Conference on Embedded Systems and Software, ICESS'09},
  author = {Dahlin, Andreas and Ersfolk, Johan and Habli, Haitham and Lilius, Johan},
  year = {2009},
}

Belongs to TUCS Research Unit(s): Embedded Systems Laboratory (ESLAB)

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