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Cost of Bandwidth-Optimized Sparse Mesh Layouts

Martti Forsell, Ville Leppänen, Martti Penttonen, Cost of Bandwidth-Optimized Sparse Mesh Layouts. In: Victor Malyshkin (Ed.), Parallel Computing Technologies - 13th International Conference, PaCT 2015, Lecture Notes in Computer Science 9251, 375–389, Springer, 2015.

Abstract:

The requirements of interconnection networks for shared memory
chip multiprocessors (CMP) differ from those used in traditional
application-specific networks on chip (NOC). This is because modern
CMP cores tend to inject memory references to the network frequently
(up to once per clock cycle) and the latency of references should be as
low as possible. The throughput computing paradigm is a mechanism to
trade the low latency requirement to high throughput in CMPs by overlapping
memory references from processors with a help of multithreading.
To meet the bandwidth requirements of throughput computing CMPs we
have studied using d-dimensional sparse meshes and tori. Unfortunately
it has turned out that either there is too much bandwidth leading to high
silicon area and energy consumption of the links get longer decreasing
the clock rate. In this paper we study the cost of bandwidth-optimized
2-dimensional meshes and tori for CMPs using the throughput computing
paradigm. We present the layout as well as determine link length,
degree of node and compare them to those of d-dimensional meshes and
tori. For area and power efficiency considerations, we also give estimates
on silicon area and power consumption.

BibTeX entry:

@INPROCEEDINGS{inpFoLePe15a,
  title = {Cost of Bandwidth-Optimized Sparse Mesh Layouts},
  booktitle = {Parallel Computing Technologies - 13th International Conference, PaCT 2015},
  author = {Forsell, Martti and Leppänen, Ville and Penttonen, Martti},
  volume = {9251},
  series = {Lecture Notes in Computer Science},
  editor = {Malyshkin, Victor},
  publisher = {Springer},
  pages = {375–389},
  year = {2015},
}

Belongs to TUCS Research Unit(s): Software Development Laboratory (SwDev)

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