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An Efficient GPU-Based LDPC Decoder for Long Codewords

Stefan Grönroos, Kristian Nybom, Jerker Björkqvist, An Efficient GPU-Based LDPC Decoder for Long Codewords. In: John Glossner (Ed.), Proceedings of the SDR 11 Technical Conferenc and Product Exposition, 272–279, Wireless Innovation Forum, Inc., 2011.

Abstract:

The DVB-S2 and DVB-T2 standards for digital television broadcasting specify the use of Low-Density Parity-Check (LDPC) codes with codeword lengths of up to 64800 bits. The real-time decoding of these codes on general purpose computing hardware is interesting for completely software defined receivers, as well as for testing and simulation purposes. Modern graphics processing units (GPUs) are capable of massively parallel computation, and can, given carefully designed algorithms, outperform general purpose CPUs by an order of magnitude or more. The main problem in decoding LDPC codes on GPU hardware is that LDPC decoding generates many irregular memory accesses, which tend to carry heavy performance penalties on GPUs. The high memory access latencies can be partially avoided by decoding several codewords in parallel, as well as by using appropriate data structures to efficiently parallelize memory accesses. In this paper we present the algorithms and data structures used to make log-domain decoding of the long LDPC codes specified by the DVB-T2 standard - at the high data rates required for television broadcasting - possible on a modern GPU.

BibTeX entry:

@INPROCEEDINGS{inpGrNyBj11a,
  title = {An Efficient GPU-Based LDPC Decoder for Long Codewords},
  booktitle = {Proceedings of the SDR 11 Technical Conferenc and Product Exposition},
  author = {Grönroos, Stefan and Nybom, Kristian and Björkqvist, Jerker},
  editor = {Glossner, John},
  publisher = {Wireless Innovation Forum, Inc.},
  pages = {272–279},
  year = {2011},
  keywords = {LDPC, GPU, CUDA, DVB},
}

Belongs to TUCS Research Unit(s): Embedded Systems Laboratory (ESLAB)

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