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Optimizing Off-Chip Memory Access Costs in Low Power MPEG-4 Decoder

Haitham Habli, Johan Ersfolk, Johan Lilius, Tomi Westerlund, Jari Nurmi, Optimizing Off-Chip Memory Access Costs in Low Power MPEG-4 Decoder. In: Proceedings of the 3rd International Conference on Information and Communication Systems, ICICS '12, 17:1–17:5, ACM, 2012.

http://dx.doi.org/10.1145/2222444.2222461

Abstract:

One of the main sources for energy consumption in modern video coding algorithms is caused by reading reference frames from main memory. Once a reference frame block is in the local memory, we need to predict in advance when the same reference frame block would be reread from the main memory. The prediction relies on the calculation of motion vectors according to their absolute addresses. The reduction of the number of read accesses can be attained by calculating which motion vectors point to a part of the reference frame that can be copied to a local memory. This increases data locality, and thus reduces energy consumption. The optimized memory access algorithm was integrated into low power MPEG-4 decoder architecture [1, 2] and modeled using SystemC. A cycle accurate model simulation with optimized algorithm showed an average of 10% increase on runtime performance compared to an unoptimized typical video decoding algorithm.

BibTeX entry:

@INPROCEEDINGS{inpHaErLiWeNu12a,
  title = {Optimizing Off-Chip Memory Access Costs in Low Power MPEG-4 Decoder},
  booktitle = {Proceedings of the 3rd International Conference on Information and Communication Systems},
  author = {Habli, Haitham and Ersfolk, Johan and Lilius, Johan and Westerlund, Tomi and Nurmi, Jari},
  series = {ICICS '12},
  publisher = {ACM},
  pages = {17:1–17:5},
  year = {2012},
  keywords = {fine-grained, heterogeneous, low power, memory access, motion vector, reusable data, video decoder},
}

Belongs to TUCS Research Unit(s): Embedded Systems Laboratory (ESLAB), Embedded Computer and Electronic Systems (ECES)

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