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Fault Tolerance Analysis of Distributed Algorithms for Mesh Networks-on-Chip

Teijo Lehtonen, Pasi Liljeberg, Juha Plosila, Fault Tolerance Analysis of Distributed Algorithms for Mesh Networks-on-Chip. In: 9th International Symposium on Signals, Circuits and Systems, ISSCS 2009, 149-152, IEEE, 2009.

Abstract:

The reliability of networks-on-chip can be increased by developing routing algorithms that provide fault tolerance. Distributed routing algorithms are a class of algorithms where the routing decisions are made without knowledge of the global state of the network. The paper presents a distributed routing algorithm, which targets to maximal fault tolerance. Total of 11 different algorithms are analyzed in their fault tolerance and average hop count using a dedicated in-house C++ simulator. Five of the algorithms are variations of the proposed algorithm and the rest are references or algorithms presented in literature. The developed fully adaptive algorithm is shown to provide superior fault tolerance. The best deadlock-free algorithm is the variation based on the north-last turn model. In the class of minimal algorithms the dynamic xy algorithm provides the highest fault tolerance.

BibTeX entry:

@INPROCEEDINGS{inpLeLiPl09b,
  title = {Fault Tolerance Analysis of Distributed Algorithms for Mesh Networks-on-Chip},
  booktitle = {9th International Symposium on Signals, Circuits and Systems, ISSCS 2009},
  author = {Lehtonen, Teijo and Liljeberg, Pasi and Plosila, Juha},
  publisher = {IEEE},
  pages = {149-152},
  year = {2009},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab)

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