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Complexity Analysis of H.264 Decoder for FPGA Design

Tuomas Lindroth, Nastooh Avessta, Jukka Teuhola, Tiberiu Seceleanu, Complexity Analysis of H.264 Decoder for FPGA Design. In: IEEE International Conference on Multimedia and EXPO (ICME 2006), 1253-1256, IEEE, 2006.

Abstract:

A major challenge in the design of any real time system is the proper
selection of implementation and platform alternatives. In this paper,
a suitable FPGA-based design of the H.264 decoder is presented. Since
H.264 standard only specifies the syntax and semantics of the video
stream and not the video codec itself, the selection process may be
directed based upon the temporal complexity of different parts of the
decoder. Here, we present the process flow of these parts using basic
algebraic operators. The analysis of the required logic elements to
implement the decoder, on various platforms, is presented.

BibTeX entry:

@INPROCEEDINGS{inpLiAvTeSe06a,
  title = {Complexity Analysis of H.264 Decoder for FPGA Design},
  booktitle = {IEEE International Conference on Multimedia and EXPO (ICME 2006)},
  author = {Lindroth, Tuomas and Avessta, Nastooh and Teuhola, Jukka and Seceleanu, Tiberiu},
  publisher = {IEEE},
  pages = {1253-1256},
  year = {2006},
}

Belongs to TUCS Research Unit(s): Communication Systems (ComSys)

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