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A 130 nm Implementation of Analog Variable Block-Size Motion Estimation Cell

Joona Marku, Lauri Koskinen, Ari Paasio, A 130 nm Implementation of Analog Variable Block-Size Motion Estimation Cell. In: International Symposium On Integrated Circuits 2007 (ISIC 2007), 2007.

Abstract:

An evolved version of variable block-size analog motion estimation
cell structure is presented. Due to the space restrictions of interconnects,
used advanced variable block-size motion estimation architecture necessitates
using deep-submicron design technology, which enables the dense
spacing of interconnects. Therefore, a novel architecture realizing the cell structure in modern 130 nm
technology and being more robust against analog inaccuracies than
previous implementations, is designed and simulated.

BibTeX entry:

@INPROCEEDINGS{inpMaKoPa07a,
  title = {A 130 nm Implementation of Analog Variable Block-Size Motion Estimation Cell},
  booktitle = {International Symposium On Integrated Circuits 2007 (ISIC 2007)},
  author = {Marku, Joona and Koskinen, Lauri and Paasio, Ari},
  year = {2007},
}

Belongs to TUCS Research Unit(s): Microelectronics

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