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Generation of Structural VHDL Code with Library Components

Sergey Ostroumov, Leonidas Tsiopoulos, Juha Plosila, Kaisa Sere, Generation of Structural VHDL Code with Library Components. In: José Silva, Francesco Leporati (Eds.), 16th Euromicro Conference on Digital System Design DSD 2013, 111–118, IEEE Conference Publishing Services (CPS), 2013.

http://dx.doi.org/10.1109/DSD.2013.20

Abstract:

We propose a design approach to integrating correct-by-construction formal modeling with hardware implementations in VHDL. Formal modeling is performed within the Event-B framework that supports the refinement approach, i.e., stepwise unfolding of system properties in a correct-by-construction manner. After an implementable model of a hardware system is derived, we apply an additional refinement step in order to introduce hardware library components in the form of functions. We show the mapping between these functions and corresponding library components such that structural, i.e., component-based, VHDL implementation is erived. The application of functions binds nrestricted data types and substitutes regular perations with function calls. The approach is resented through examples that illustrate the dditional refinement step and the code eneration. We show the advantages in terms of ccupied area (2,5% and 12,5%) and performance 13,7% and 15,4%) of the descriptions that ncorporate hardware library components.

BibTeX entry:

@INPROCEEDINGS{inpOsTsPlSe13a,
  title = {Generation of Structural VHDL Code with Library Components},
  booktitle = {16th Euromicro Conference on Digital System Design DSD 2013},
  author = {Ostroumov, Sergey and Tsiopoulos, Leonidas and Plosila, Juha and Sere, Kaisa},
  editor = {Silva, José and Leporati, Francesco},
  publisher = {IEEE Conference Publishing Services (CPS)},
  pages = {111–118},
  year = {2013},
  keywords = {automated refinement; code generation; design flow; Event-B; formal methods; library components; structural VHDL},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab), Embedded Systems Laboratory (ESLAB), Embedded Computer and Electronic Systems (ECES)

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