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Outline of RISC-based Core for Multiprocessor on Chip Architecture Supporting Moving Threads

Jani Paakkulainen, Jari-Matti Mäkelä, Ville Leppänen, Martti Forsell, Outline of RISC-based Core for Multiprocessor on Chip Architecture Supporting Moving Threads. In: Proceedings of International Conference on Computer Systems and Technologies, CompSysTech'09, 6 pages, 2009.

Abstract:

Programming multicore systems is currently considered very
difficult. One reason is that those are mostly constructed from the
hardware point of view. Many of the processor core design solutions
in contemporary constructions emphasize execution speed of a single
thread. Since the memory access delay is the real bottleneck, such
techniques often aim at maximizing cache hits by programmer guided
locality of memory references and prefetching memory locations, etc.

In this paper, we consider constructing processor core solutions
that support easy-to-use programming approach based on the PRAM
model. Specifically, we consider a processor core design of a
multicore system, where the aim is to amortize the memory access
delays by having multiple simultaneuous executable software threads
per each processor core. The core switches the executed extremely
light-weight thread at each step, and thus the core can wait for
pending memory requests to complete without any penalty (as long as
its has non-blocked threads). Moreover, we consider the core to
support moving threads paradigm instead of traditional moving data
paradigm. We present an outline of such a processor core
architecture, where we change the traditional pipelined execution
model of RISC.

Files:

Full publication in PDF-format

BibTeX entry:

@INPROCEEDINGS{inpPaMaLeFo09a,
  title = {Outline of RISC-based Core for Multiprocessor on Chip Architecture Supporting Moving Threads},
  booktitle = {Proceedings of International Conference on Computer Systems and Technologies, CompSysTech'09},
  author = {Paakkulainen, Jani and Mäkelä, Jari-Matti and Leppänen, Ville and Forsell, Martti},
  pages = {6 pages},
  year = {2009},
}

Belongs to TUCS Research Unit(s): Algorithmics and Computational Intelligence Group (ACI)

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