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FPGA Prototype of the REALJava Co-Processor

Tero Säntti, Joonas Tyystjärvi, Juha Plosila, FPGA Prototype of the REALJava Co-Processor. In: 2007 International Symposium on System-on-Chip, 2007.

Abstract:

This paper presents the FPGA prototype of the REALJava co-processor. The virtual machine architecture is described along with the modifications required in the FPGA environment. The FPGA prototype is relevant, as it allows a realistic throughput between the CPU and the co-processor and provides the whole system with a more realistic CPU performance in respect to embedded environments. Our co-processor is designed in a highly modular fashion, especially separating the communication from the actual core. This modularity of the design makes the co-processor more reusable and allows system level scalability. This work is a part of a project focusing on design of an advanced Java co-processor for Java intensive SoC applications.

BibTeX entry:

@INPROCEEDINGS{inpSaTyPl07a,
  title = {FPGA Prototype of the REALJava Co-Processor},
  booktitle = {2007 International Symposium on System-on-Chip},
  author = {Säntti, Tero and Tyystjärvi, Joonas and Plosila, Juha},
  year = {2007},
}

Belongs to TUCS Research Unit(s): Microelectronics

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