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Formal, Time Aware Modelling of Communication Channels for VLSI Systems

Tomi Westerlund, Juha Plosila, Formal, Time Aware Modelling of Communication Channels for VLSI Systems. In: Proceedings of the Brasilian Symposium on Formal Methods (SBMF'06), 27-42, 2006.

Abstract:

We model and analyse abstract communication networks for globally asynchronous and locally synchronous (GALS) systems using the Timed
Action Systems formalism. With Timed Action Systems we are able to
model VLSI systems not only logically but also with respect to timing
characteristics. The communication network is based on procedure
calls that ensure the data integrity during the communication. The
timing analysis enable us to estimate the time consumed in
communication network already at a high abstraction level.

BibTeX entry:

@INPROCEEDINGS{inpWePl06a,
  title = {Formal, Time Aware Modelling of Communication Channels for VLSI Systems},
  booktitle = {Proceedings of the Brasilian Symposium on Formal Methods (SBMF'06)},
  author = {Westerlund, Tomi and Plosila, Juha},
  pages = {27-42},
  year = {2006},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab)

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