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Formal Modelling of Multiclocked VLSI Systems

Tomi Westerlund, Juha Plosila, Formal Modelling of Multiclocked VLSI Systems. In: Jari Nurmi, Jarmo Takala (Eds.), Proceedings of the International Symposium on System-on-Chip (SoC) 2006, Tampere, Finland, November 13-16, 2006, 141-144, 2006.

Abstract:

We introduce a formal, time aware model for multiclocked SoC
systems using the Action Systems formalism spiced with timing
information. The multiclocked SoC model by itself guarantees
the correct operation of the correct synchronous operation,
and the data integrity during communication is ensured using
a procedure based communication scheme and the prioritised
composition that disables computation during communication
activities.

BibTeX entry:

@INPROCEEDINGS{inpWePl06c,
  title = {Formal Modelling of Multiclocked VLSI Systems},
  booktitle = {Proceedings of the International Symposium on System-on-Chip (SoC) 2006, Tampere, Finland, November 13-16, 2006},
  author = {Westerlund, Tomi and Plosila, Juha},
  editor = {Nurmi, Jari and Takala, Jarmo},
  pages = {141-144},
  year = {2006},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab)

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