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Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip. In: Youssef Hamadi, Marc Schoenauer (Eds.), Learning and Intelligent OptimizatioN Conference (LION 6), Lecture Notes in Computer Science, 307–322, Springer Berlin Heidelberg, 2012.
http://dx.doi.org/10.1007/978-3-642-34413-8_22
Abstract:
Application mapping is an important issue in designing systems based on many-core networks-on-chip (NoCs). Simulated Annealing (SA) has been often used for searching for the optimized solution of application mapping problem. The parameters applied in the SA algorithm jointly control the annealing schedule and have great impact on the runtime and the quality of the final solution of the SA algorithm. The optimized parameters should be selected in a systematic way for each particular mapping problem, instead of using an identical set of empirical parameters for all problems. In this work, we apply an optimization method, Nelder-Mead simplex method, to obtain optimized parameters of SA. The experiment shows that with optimized parameters, we can get an average 237 times speedup of the SA algorithm, compared to the work where the empirical values are used for setting parameters. For the set of benchmarks, the proposed parameter-optimized SA algorithm achieves comparable communication energy consumption using less than 1% of iterations of that used in the reference work.
BibTeX entry:
@INPROCEEDINGS{inpYaGuSxPlxxa,
title = {Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip},
booktitle = {Learning and Intelligent OptimizatioN Conference (LION 6)},
author = {Yang, Bo and Guang, Liang and Säntti, Tero and Plosila, Juha},
series = {Lecture Notes in Computer Science},
editor = {Hamadi, Youssef and Schoenauer, Marc},
publisher = {Springer Berlin Heidelberg},
pages = {307–322},
year = {2012},
}
Belongs to TUCS Research Unit(s): Embedded Computer and Electronic Systems (ECES)
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