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Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput

Ethiopia Nigussie, Sampo Tuuna, Juha Plosila, Jouni Isoaho, Hannu Tenhunen, Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20(12), 2265 – 2277, 2012.

Abstract:

A high-throughput and low-energy semi-serial on-chip communication link based on novel design techniques and circuit solutions is presented. This self-timed link is designed using high-speed serialization/deserializtion and pulse dual-rail encoding techniques. The link also employs wave-pipelined differential pulse current-mode signaling to maintain the high speed data intake from the serializer. The energy efficiency of the proposed semi-serial link, which consists of bit-serial links in parallel, mainly comes from the sharing of the novel serializer’s control circuit among the bit-serial links. In addition, the integration of pulse signaling with wave-pipelining, the use of a new low-complexity data validity detection technique, and the avoidance of data decoding logic also contribute to the power reduction. Furthermore, the formulated pulse dual-rail encoding provides an opportunity to implement pulse signaling at no cost. The ability to detect data validity at bit level allows acknowledgment per word without
losing the delay-insensitivity of the transmission. The proposed
semi-serial link is analyzed and compared with bit-serial and fully
bit-parallel links for 64-bit data and communication distances of
1 to 8 mm. The semi-serial link which consists of eight bit-serial
links provides 72.72 Gbps throughput with 286 fJ/bit energy dissipation
for 8 mm transmission. It dissipates the lowest energy per
bit compared to fully bit-parallel links while achieving the same
throughput. The links are designed and simulated in Cadence
Analog Spectre using 65-nm technology from STMicroelectronics.

BibTeX entry:

@ARTICLE{jNiTuPlIsTe11a,
  title = {Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput},
  author = {Nigussie, Ethiopia and Tuuna, Sampo and Plosila, Juha and Isoaho, Jouni and Tenhunen, Hannu},
  journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  volume = {20},
  number = {12},
  pages = {2265 – 2277},
  year = {2012},
  keywords = {Differential current-mode signaling, network-onchip (NoC), pulse signaling, self-timed delay-insensitive communication, wave-pipelining},
}

Belongs to TUCS Research Unit(s): Communication Systems (ComSys)

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