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Model Based Testing of a Network-on-Chip Component

Leonidas Tsiopoulos, Manoranjan Satpathy, Model Based Testing of a Network-on-Chip Component. Electronic Notes in Theoretical Computer Science 253(2), 101–116, 2009.

Abstract:

We discuss the problem of model based test case generation and that of automatic testing of a component of an asynchronous Network-on-Chip (NoC). We start with a model of the component in B Action System, which is a state based formalism based on Action Systems and the B Method. We construct a finite state space graph by executing the model, and next, generate a test driver from the abstract test cases. This test driver can be used to test a matching implementation automatically. The important contribution of our work is that we consider hierarchical models for test case generation and automatic testing, whereas the previous approaches considered flat models. In addition, we also highlight the issue due to non-determinism in hierarchical models.

BibTeX entry:

@ARTICLE{jTsSa09a,
  title = {Model Based Testing of a Network-on-Chip Component},
  author = {Tsiopoulos, Leonidas and Satpathy, Manoranjan},
  journal = {Electronic Notes in Theoretical Computer Science},
  volume = {253},
  number = {2},
  pages = {101–116},
  year = {2009},
  keywords = {Model Based Testing, Network-on-Chip, B Method, Action Systems},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab)

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