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A System-level Framework for Designing and Evaluating Protocol Processor Architectures

Seppo Virtanen, Tero Nurmi, Jani Paakkulainen, Johan Lilius, A System-level Framework for Designing and Evaluating Protocol Processor Architectures. International Journal of Embedded Systems 1(1-2), 78–90, 2006.

Abstract:

To meet the tightening requirements on network hardware, the design of
programmable processors with network-optimised hardware, that is, network
or protocol processors, has attracted interest. In this paper, we address
evaluation of different architectural configurations for such processors,
and reuse of previously designed components in later design projects. The
proposed system-level framework enables easy and fast experimentation
with different protocol processor hardware architecture configurations to
estimate their performance characteristics at early stages in the design
process. We conclude the paper with examples of designing processors using
the framework.

BibTeX entry:

@ARTICLE{jViNuPaLi06a,
  title = {A System-level Framework for Designing and Evaluating Protocol Processor Architectures},
  author = {Virtanen, Seppo and Nurmi, Tero and Paakkulainen, Jani and Lilius, Johan},
  journal = {International Journal of Embedded Systems},
  volume = {1},
  number = {1-2},
  pages = {78–90},
  year = {2006},
}

Belongs to TUCS Research Unit(s): Embedded Systems Laboratory (ESLAB), Communication Systems (ComSys)

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