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A Minimal Average Accessing Time Scheduler for Multicore Processors

Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen, A Minimal Average Accessing Time Scheduler for Multicore Processors . Lecture Notes in Computer Science (LNCS) 7017, 287–299, 2011.

http://dx.doi.org/10.1007/978-3-642-24669-2_28

Abstract:

In this paper, we study and analyze process scheduling for multicore processors. It is expected that hundreds of cores will be integrated on a single chip, known as a Chip Multiprocessor (CMP). However, operating system process scheduling, one of the most important design issue for CMP systems, has not been well addressed. We define a model for future CMPs, based on which a minimal average accessing time scheduling algorithm is proposed to reduce on-chip communication latencies and improve performance. The impact of memory access and inter process communication (IPC) in scheduling are analyzed. We explore six typical core allocation strategies. Results show that, a strategy with the minimal average accessing time of both core-core and core-memory outperforms other strategies, the overall performance for three applications (FFT, LU and H.264) has improved for 8.23%, 4.81% and 10.21% respectively comparing with other strategies.

BibTeX entry:

@ARTICLE{jXuLiTe11a,
  title = {A Minimal Average Accessing Time Scheduler for Multicore Processors },
  author = {Xu, Thomas Canhao and Liljeberg, Pasi and Tenhunen, Hannu},
  journal = {Lecture Notes in Computer Science (LNCS)},
  volume = {7017},
  publisher = {Springer},
  pages = {287–299},
  year = {2011},
}

Belongs to TUCS Research Unit(s): Embedded Computer and Electronic Systems (ECES)

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