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Implementing Grayscale Morphological Operators with a Compact Ranked Order Extractor Circuit

Jonne Poikonen, Ari Paasio, Implementing Grayscale Morphological Operators with a Compact Ranked Order Extractor Circuit. In: Proceedings of the 7th IEEE International Workshop on Cellular Neural Networks and their Applications, 646-653, Word Scientific, 2002.

Abstract:

Mathematical morphology provides tools for many image processing
tasks. In this paper we discuss the implementation of grayscale
morphological operators of erosion, dilation and reconstruction with a hardware efficient ranked order filter circuit. By using dedicated hardware for these basic operations a higher performance of processing more complex functions in a massively parallel processor array can be achieved. Because the circuit realization of the ranked order filter used is very compact, the area required for one processing cell can be kept low. Simulations of the operation were performed with a 0.18um digital CMOS technology.

BibTeX entry:

@INPROCEEDINGS{pPoPa02a,
  title = {Implementing Grayscale Morphological Operators with a Compact Ranked Order Extractor Circuit},
  booktitle = {Proceedings of the 7th IEEE International Workshop on Cellular Neural Networks and their Applications},
  author = {Poikonen, Jonne and Paasio, Ari},
  publisher = {Word Scientific},
  pages = {646-653},
  year = {2002},
}

Belongs to TUCS Research Unit(s): Microelectronics

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