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Specification of an Asynchronous On-Chip Bus

Juha Plosila, Tiberiu Seceleanu, Specification of an Asynchronous On-Chip Bus. In: Formal Methods and Software Engineering, LNCS 2495, 383-395, Springer, 2002.

Abstract:

The latest improvements in the technology of digital devices allow designers
to build whole systems on a single silicon chip. New problems arise in this context, one of them being the complexity of interconnections. Optimizing
interfaces has become a tedious design step. Other problematic issues are
global clock signal distribution and design composability, for which
synchronous design methodology proves to be a good solution. Formal methods can be used to verify the logical correctness of digital hardware. These methods are well featured for asynchronous designs and this study introduces bus-modeling aspects in the formal framework of Action Systems.

Files:

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BibTeX entry:

@INPROCEEDINGS{pPlSe02a,
  title = {Specification of an Asynchronous On-Chip Bus},
  booktitle = {Formal Methods and Software Engineering},
  author = {Plosila, Juha and Seceleanu, Tiberiu},
  volume = {2495},
  series = {LNCS},
  publisher = {Springer},
  pages = {383-395},
  year = {2002},
}

Belongs to TUCS Research Unit(s): Distributed Systems Laboratory (DS Lab)

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