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High Level Power Estimation

Johanna Tuominen, Juha Plosila, High Level Power Estimation. TUCS Technical Reports 623, Turku Centre for Computer Science, 2004.

Abstract:

In a synchronous circuits, the global clock signal couples the
computation and the physical time. Therefore, the clock frequency
measures directly the switching activity of the system which can
be used directly in the power calculation. On the contrary, in a
self-timed circuits there is no notion of physical time. Thus, the
operation of such system is based on ordering events between
circuit components. In addition to that, the duration of given
computation depends strongly on the data, which makes it difficult
to use the algorithms developed for synchronous circuits directly.

An overview of selected high-level power estimation techniques is
given for both synchronous and asynchronous systems. In this
report, a specification of a formal high level power estimation is
presented. The purpose is to include this model into our existing
formal framework for system specification.

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BibTeX entry:

@TECHREPORT{tTuPl04a,
  title = {High Level Power Estimation},
  author = {Tuominen, Johanna and Plosila, Juha},
  number = {623},
  series = {TUCS Technical Reports},
  publisher = {Turku Centre for Computer Science},
  year = {2004},
  ISBN = {952-12-1416-3},
}

Belongs to TUCS Research Unit(s): Communication Systems (ComSys)

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