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Articles in journals (3):
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
Mapping Multiple Applications with Unbounded and Bounded Number of Cores on Many-Core Networks-on-Chip
.
Microprocessors and Microsystems
37(4-5), 460–471, 2013.
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
Tree-Model Based Contention-Aware Task Mapping on Many-Core Networks-on-Chip
.
Communications in Information Science and Management Engineering (CISME)
01, 6, 2012.
Bo Yang, Ying Liu, Tingting Lin,
Operational Capabilities Redeployment in Information Technology Outsourcing: from Chinese Vendor’s Perspective
.
International Journal of Information Processing and Management
3(2), 98–105, 2012.
Articles in proceedings (15):
Liang Guang, Syed M. A. H. Jafri, Bo Yang, Juha Plosila, Hannu Tenhunen,
Hierarchical Supporting Structure for Dynamic Organization in Many-Core Computing Systems
. In: César Benavente-Peces, Joaquim Filipe (Eds.),
Proceedings of the 3rd International Conference on Pervasive Embedded Computing and Communication Systems
, 252–261, SCITEPRESS – Science and Technology Publications, 2013.
Liang Guang, Syed M. A. H. Jafri, Bo Yang, Juha Plosila, Hannu Tenhunen,
Embedding Fault-Tolerance with Dual-Level Agents in Many-Core Systems
. In: Said Hamidioui, Hans Manhaeve (Eds.),
First MEDIAN Workshop (MEDIAN'12)
, 41–44, EU COST Action IC1103 Median, 2012.
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip
. In: Youssef Hamadi, Marc Schoenauer (Eds.),
Learning and Intelligent OptimizatioN Conference (LION 6)
, Lecture Notes in Computer Science, 307–322, Springer Berlin Heidelberg, 2012.
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
tk-SA: Accelerated Simulated Annealing Algorithm for Application Mapping on Networks-on-Chip
. In: Terry Soule (Ed.),
Genetic and Evolutionary Computation Conference (GECCO 2012)
, 1191–1198, ACM, 2012.
Bo Yang, Tingting Lin,
IT and IS Outsourcing Research in International and Chinese Academia: A Comparative Literature Review
. In: Gabriel Ogunmokun, Rony Gabbay, Janelle Rose (Eds.),
Managing, Marketing and Financing Organizations in an Era of Economic Uncertainty
, 512–523, The Academy of World Business, Marketing, and Management Development, 2012.
Liang Guang, Bo Yang, Juha Plosila, Jouni Isoaho, Hannu Tenhunen,
Hierarchical Agent Monitoring Design Platform towards Self-Aware and Adaptive Embedded Systems
. In: César Benavente-Peces, Joaquim Filipe (Eds.),
Proceedings of International Conference on Pervasive and Embedded Computing and Communication Systems (PECCS 2011)
, 573 - 581, SciTePress , 2011.
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
Tree-Model Based Contention-Aware Task Mapping on Many-Core Network-on-Chips
. In: Bo Yang, Liang Guang, Tero Säntti, Juha Plosila (Eds.),
The 3rd International Conference on Information Science and Engineering (ICISE2011)
, 731-736, IEEE, 2011.
Alexander Wei Yin, Thomas Canhao Xu, Bo Yang, Pasi Liljeberg, Hannu Tenhunen,
Change Function of 2D/3D Network-on-Chip
. In:
11th IEEE International Conference on Computer and Information Technology
, 181-188, IEEE, 2011.
Liang Guang, Bo Yang, Juha Plosila, Khalid Latif, Hannu Tenhunen,
Hierarchical Power Monitoring on NoC – A Case Study for Hierarchical Agent Monitoring Design Approach
. In:
proceedings of IEEE Norchip 2010
, 1-6, IEEE, 2010.
Thomas Canhao Xu, Liang Guang, Alexander Wei Yin, Bo Yang, Pasi Liljeberg, Hannu Tenhunen,
An Analysis of Designing 2D/3D Chip Multiprocessor with Different Cache Architecture
. In:
28th IEEE Norchip Conference
, 1-6, IEEE, 2010.
Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen,
3D Network-on-Chip with on-chip DRAM: an empirical analysis for future Chip Multiprocessor
. In:
2010 International Conference on Computer, Electrical, and Systems Science, and Engineering
, 18-24, WASET, 2010.
Bo Yang, Liang Guang, Tero Säntti, Juha Plosila,
A Dynamic Fault-Tolerant Remapping Algorithm Based on Tree-Model of Network-on-Chip
. In:
Workshop on Designing for Embedded Parallel Computing Platforms in Design Automation and Test Europe Conference (DATE)
, 26, 2010.
Bo Yang, Liang Guang, Thomas Canhao Xu, Tero Säntti, Juha Plosila,
Multi-Application Mapping Algorithm for Network-on-Chip Platforms
. In:
2010 IEEE 26th Convention of Electrical and Electronics Engineers in Israel (IEEEI),
, 540 - 544, 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel, 2010.
Bo Yang, Liang Guang, Thomas Canhao Xu, Alexander Wei Yin, Tero Säntti, Juha Plosila,
Multi-Application Multi-Step Mapping Method for Many-Core Network-on-Chips Platforms
. In:
NORCHIP, 2010
, 1 -6, 2010.
Bo Yang, Thomas Canhao Xu, Tero Säntti, Juha Plosila,
Tree-Model Based Mapping for Energy-Efficient and Low-Latency Network-on-Chip
. In:
2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS),
, 2010.
Ph.D. thesis (1):
Bo Yang,
Towards Optimal Application Mapping for Energy-Efficient Many-Core Platforms
. TUCS Dissertations 167. 2013.