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Department: Any ÅAU / Department of Information Technologies UTU / Department of Information Technology UTU / Department of Mathematics and Statistics UTU / Turku School of Economics, Institute of Information Systems Sciences

Research Unit: Any Algorithmics and Computational Intelligence Group (ACI) Biomathematics Research Unit (BIOMATH) Communication Systems (ComSys) Computational Biomodeling Laboratory (Combio Lab) Data Mining and Knowledge Management Laboratory Distributed Systems Laboratory (DS Lab) Embedded Computer and Electronic Systems (ECES) Embedded Systems Laboratory (ESLAB) FUNDIM, Fundamentals of Computing and Discrete Mathematics Institute for Advanced Management Systems Research (IAMSR) Learning and Reasoning Lab Software Construction Laboratorium Software Development Laboratory (SwDev) Software Engineering Laboratory (SE Lab) Turku BioNLP Group Turku Optimization Group (TOpGroup) UTU Information Systems Science (ISS)

Publication type: Any Monographs Edited books Edited special issues of journals Edited proceedings Articles in journals Articles in proceedings Chapters in edited books Ph.D. thesis Lic. thesis Technical reports

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Edited proceedings (3):

• Jacek Flak, Mika Laiho, Ari Paasio (Eds.), Scalable Fault-Tolerant Logic System Based on Regular Array of Locally Interconnected Gates, IEEE International Workshop on Cellular Neural Networks and their Applications, 2008.
• Jacek Flak, Mika Laiho, Ari Paasio (Eds.), Fault-Tolerant Architecture for Nanoelectronic Digital Logic, International Conference on Signals and Electronic Systems, 2008.
• Joona Marku, Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio (Eds.), Current Mismatch and Nonlinearity Compensation in Mixed-Mode Array Processors, 2008.

Articles in journals (16):

• Mika Laiho, Victor Brea, Ari Paasio, Effect of Mismatch on the Reliability of ON/OFF Probrammable CNNs. IEEE IEEE Transactions on Circuits and Systems-I 56(10), 2259-2269, 2009.
• Jonne Poikonen, Mika Laiho, Ari Paasio, Lauri Koskinen, Kari Halonen, An Analog Processor Array Implementing Interconnect-Efficient Reference Data Shift and SAD/SSD Extraction for Motion Estimation. EURASIP Journal on Advances in Signal Processing 2009, 11, 2009.
• Jonne Poikonen, Ari Paasio, An 8x8 Cell Analog Order-Statistic-Filter Array With Asynchronous Grayscale Morphology in 0.13um CMOS. IEEE Transactions on Circuits and Systems I: Regular Papers 56(8), 1541-1553, 2009.
• Mika Laiho, Ari Paasio, Jacek Flak, Kari Halonen, Template Design for Cellular Nonlinear Networks with One-Bit Weights. IEEE Trans. on Circuits and Systems-I 55(3), 904-913, 2008.
• Janne Maunu, Mika Laiho, Ari Paasio, A Differential Architecture for an Online Analog Viterbi Decoder. IEEE Transactions on Circuits and Systems - I 55, 1133-1140, 2008.
• Lauri Koskinen, Ari Paasio, Kari Halonen, CNN-Type Algorithms for H.264 Variable Block-Size Partitioning. SIGNAL PROCESSING: IMAGE COMMUNICATION 22, 797–808, 2007.
• Olli Lahdenoja, Mika Laiho, Janne Maunu, Ari Paasio, A Massively Parallel Face Recognition System. EURASIP Journal on Embedded Systems - Special Issue on Embedded Vision System , 13, 2007.
• Victor M. Brea, Mika Laiho, David Vilarino, Ari Paasio, Diego Cabello, A Binary-Based On-Chip CNN Solution for Pixel-Level Snakes. International Journal of Circuit Theory and Applications 34(4), 383–407, 2006.
• Jacek Flak, Mika Laiho, Ari Paasio, Kari Halonen, Dense CMOS Implementation of a Binary-Programmable Cellular Neural Network. International Journal of Circuit Theory and Applications 34(4), 429–443, 2006.
• Mikko Pänkäälä, Kati Virtanen, Ari Paasio, An Analog 2D DCT Processor. IEEE Transactions on Circuits and Systems for Video Technology 16(10), 1209–1216, 2006.
• Lauri Koskinen, Ari Paasio, Kari Halonen, Motion Estimation Computational Complexity Reduction With CNN Shape Segmentation. IEEE Transactions on Circuits and Systems for Video Technology 15(6), 771–777, 2005.
• Victor M. Brea, David L. Vilarino, Ari Paasio, Diego Cabello, Design of the Processing Core of a Mixed-Signal CMOS DTCNN Chip for Pixel-Level Snakes. Transactions on Circuits and Systems - I 51(5), 997-1013, 2004.
• Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen, A Mixed-Mode Polynomial Cellular Array Processor Hardware Realization. IEEE Transactions on Circuits and Systems I: Regular Papers 51(2), 286-297, 2004.
• Jonne Poikonen, Ari Paasio, A Ranked Order Filter Implementation for Parallel Analog Processing. IEEE Transactions on Circuits and Systems - I 51, 974-987, 2004.
• Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen, Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network. International Journal of Neural Systems 13, 443–452, 2003.
• Asko Kananen, Ari Paasio, Mika Laiho, Kari Halonen, CNN applications from the hardware point of view: video sequence segmentation. International Journal of Circuit Theory and Applications (2), 117–137, 2002.

Articles in proceedings (88):

• Tero Koivisto, Esa Tiiliharju, Ari Paasio, A Low-Voltage Low-Power Self-Oscillating IQ LNA-Mixer for UWB applications. In: IEEE International Conference on Ultra-Wideband, 2010.
• Lauri Koskinen, Jonne Poikonen, Mika Laiho, Ari Paasio, Rate-Distortion Performance Analysis of an Analog Motion Estimation Array. In: IEEE International Workshop on Cellular Nanoscale Networks and Applications, 2010.
• Mika Laiho, Jonne Poikonen, Ari Paasio, Object Segmentation and Tracking with Asynchronous Grayscale and Binary Wave Operations on the MIPA4k. In: IEEE International Workshop on Cellular Nanoscale Networks and Applications, 2010.
• Ari Paasio, Mika Laiho, An Improved Processing Core for MIPA-Processor Family. In: IEEE International Workshop on Cellular Nanoscale Networks and Applications, 2010.
• Jonne Poikonen, Mika Laiho, Ari Paasio, Anisotropic Fltering with a Resistive Fuse Network on the MIPA4k Processor Array. In: IEEE International Workshop on Cellular Nanoscale Networks and Applications, 2010.
• Olli Lahdenoja, Mika Laiho, Ari Paasio, On the Spatial Distribution of Local Non-parametric Facial Shape Descriptors. In: Proceedings of the 16th Scandinavian Conference on Image Analysis, SCIA 2009, 351-358, 2009.
• Mika Laiho, Jonne Poikonen, Ari Paasio, Space-Dependent Binary Image Processing Within a 64x64 Mixed-Mode Array Processor. In: Proceedings of the European Conference on Circuit Theory and Design, ECCTD 2009, 189-192 , 2009.
• Mika Laiho, Jonne Poikonen, Peter Virta, Ari Paasio, Live Demonstration: MIPA4k: A 64×64 Cell Mixed-Mode Image Processor Array. In: Proc. of theIEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009. , 1931-1931 , 2009.
• Joona Marku, Jonne Poikonen, Ari Paasio, Temperature Compensation in Combination Selection Based Mismatch Calibration. In: Proc. of the IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009. , 1589-1592 , 2009.
• Joona Marku, Jonne Poikonen, Ari Paasio, Temperature Behavior of Combination Selection Based Mismatch Calibration with 65 nm CMOS Technology. In: Proc. of the IEEE International System on Chip Conference, 2009. SOCC 2009. , 2009.
• Hao Meng, Jia Sun, Ari Paasio, A 1.2V 10bit 83MSps Pipeline ADC in 130nm CMOS. In: Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics 2009 (PrimeAsia 2009), 177-180, IEEE Circuits and Systems Society, 2009.
• Jonne Poikonen, Mika Laiho, Ari Paasio, MIPA4k: A 64×64 Cell Mixed-Mode Image Processor Array. In: Proc. of the IEEE International Symposium onCircuits and Systems, 2009. ISCAS 2009. , 1927-1930, 2009.
• Jonne Poikonen, Mika Laiho, Ari Paasio, Locally Adaptive Image Sensing with the 64x64 Cell MIPA4k Mixed-Mode Image Processor Array. In: Proceedings of the European Conference on Circuit Theory and Design, ECCTD 2009, 93-96, 2009.
• Mika Laiho, Jonne Poikonen, Ari Paasio, Kari Halonen, Centroiding and Classification of Objects Using a Processor Array with a Scalable Region of Interest. In: IEEE International Symposium on Circuits and Systems 2008, ISCAS 2008, 2008.
• Mika Laiho, Jonne Poikonen, Kati Sairanen (Virtanen), Ari Paasio, Self-Adapting Compressive Image Sensing Scheme. In: 11th International Workshop on Cellular Neural Networks and Their Applications, 2008. CNNA 2008. , 2008.
• Mika Laiho, Jonne Poikonen, Peter Virta, Ari Paasio, A 64x64 Cell Mixed-Mode Array Processor Prototyping System. In: 11th International Workshop on Cellular Neural Networks and Their Applications, 2008. CNNA 2008. , 2008.
• Joona Marku, Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio, Current Mismatch and Nonlinearity Compensation in Mixed-Mode Array Processors. In: 11th International Workshop on Cellular Neural Networks and their Applications, 2008.
• Janne Maunu, Mika Laiho, Tero Koivisto, Kati Virtanen, Mikko Pänkäälä, Ari Paasio, Mixed-Signal Baseband Processing Chain for a MB-OFDM Receiver. In: The 15th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2008, St. Julians, Malta, 2008.
• Janne Maunu, Mika Laiho, Tero Koivisto, Kati Virtanen, Mikko Pänkäälä, Ari Paasio, Mixed-Signal Viterbi Decoder for a MB-OFDM Receiver. In: The 2008 IEEE International Conference on Ultra-Wideband, ICUWB 2008, Hannover, Germany, 2008.
• Jonne Poikonen, Mika Laiho, Ari Paasio, Lauri Koskinen, Kari Halonen, Interconnect-Efficient Reference Data Shift for Optimized Analog Motion Estimation. In: 11th International Workshop on Cellular Neural Networks and Their Applications, 2008. CNNA 2008. , 2008.
• Victor Brea, Mika Laiho, Natatia Fernandez, Ari Paasio, Diego Cabello, Relating Cellular Non-Linear Networks to Threshold Logic and Single Instruction Multiple Data Computing Models. In: European Conference on Circuit Theory and Design, 2007.
• Lauri Koskinen, Joona Marku, Ari Paasio, Kari Halonen, Architecture for Analog Variable Block-Size Motion Estimation. In: International Conference On Image Processing 2007 (ICIP 2007), 2007.
• Joona Marku, Lauri Koskinen, Ari Paasio, A 130 nm Implementation of Analog Variable Block-Size Motion Estimation Cell. In: International Symposium On Integrated Circuits 2007 (ISIC 2007), 2007.
• Janne Maunu, Mika Laiho, Ari Paasio, Performance Analysis of BMC and Decision Units in the Differential Analog Viterbi Decoder. In: IEEE 25th Norchip Conference, Aalborg, Denmark, 2007.
• Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio, A 12-bit Current-Steering DAC with Calibration by Combination Selection. In: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007, New Orleans, USA, 2007.
• Victor Brea, Mika Laiho, Ari Paasio, Robustness of Binary Cellular Non-Linear Networks. In: 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece, 2006.
• Tero Koivisto, Teemu Peltonen, Meigen Shen, Esa Tjukanoff, Ari Paasio, Sine Wave As a Correlating Signal for UWB Radio. In: 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece, 2006.
• Olli Lahdenoja, Esa Alhoniemi, Mika Laiho, Ari Paasio, A Shape-Preserving Non-Parametric Symmetry Transform. In: IEEE 18th Intenational Conference on Pattern Recognition (ICPR 2006), 2, 373-377, IEEE, 2006.
• Olli Lahdenoja, Janne Maunu, Mika Laiho, Ari Paasio, A Massively Parallel ALgorithm for Local Binary Pattern Based Face Recognition. In: 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece, 2006.
• Mika Laiho, Victor Brea, Ari Paasio, Effect of Mismatch on the Reliability of Binary-Programmable CNNs . In: 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece, 2006.
• Joona Marku, Janne Maunu, Juha Plosila, Ari Paasio, Combination Selection Counter for Gaussian Distribution Applications. In: Proceedings of the 49th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2006, San Juan, Puerto Rico, IEEE, 2006.