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Department: Any ÅAU / Department of Information Technologies UTU / Department of Information Technology UTU / Department of Mathematics and Statistics UTU / Turku School of Economics, Institute of Information Systems Sciences

Research Unit: Any Algorithmics and Computational Intelligence Group (ACI) Biomathematics Research Unit (BIOMATH) Communication Systems (ComSys) Computational Biomodeling Laboratory (Combio Lab) Data Mining and Knowledge Management Laboratory Distributed Systems Laboratory (DS Lab) Embedded Computer and Electronic Systems (ECES) Embedded Systems Laboratory (ESLAB) FUNDIM, Fundamentals of Computing and Discrete Mathematics Institute for Advanced Management Systems Research (IAMSR) Learning and Reasoning Lab Software Construction Laboratorium Software Development Laboratory (SwDev) Software Engineering Laboratory (SE Lab) Turku BioNLP Group Turku Optimization Group (TOpGroup) UTU Information Systems Science (ISS)

Publication type: Any Monographs Edited books Edited special issues of journals Edited proceedings Articles in journals Articles in proceedings Chapters in edited books Ph.D. thesis Lic. thesis Technical reports

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Articles in journals (3):

• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, Mapping Multiple Applications with Unbounded and Bounded Number of Cores on Many-Core Networks-on-Chip. Microprocessors and Microsystems 37(4-5), 460–471, 2013.
• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, Tree-Model Based Contention-Aware Task Mapping on Many-Core Networks-on-Chip. Communications in Information Science and Management Engineering (CISME) 01, 6, 2012.
• Johanna Tuominen, Tero Säntti, Go Japanissa. Japan Pop (2), 64, 2007.

Articles in proceedings (26):

• Olli Lahdenoja, Tero Säntti, Jonne Poikonen, Mika Laiho, Ari Paasio, Characterizing Spatters in Laser Welding of Thick Steel Using Motion Flow Analysis. In: Erkki Oja, Matti Pietikäinen (Eds.), SCIA : 18th Scandinavian Conference on Image Analysis, Springer Lecture Notes in Computer Science (LNCS), 675–686, Springer Berlin Heidelberg, 2013.
• Thomas Schildknecht, Andreas Hinze, Juhani Peltonen, Tero Säntti, Tim Flohrer, Improved Space Object Observation Techniques using CMOS Detectors. In: Heiner Klinkrad, Holger Krag (Eds.), 6th European Conference on Space Debris, , ESA/ESOC, 2013.
• Rami Vainio, Hannu-Pekka Hedman, E. Hæggström, Juhani Peltonen, Risto Punkkinen, Tero Säntti, Eino Valtonen, Anssi Ilmanen, Misganaw Mera, Juha Pentikäinen, Jarmo Perälä, J. Sandhu, Timo Soukka, RADMON – Radiation Monitor for Aalto-1 Nanosatellite. In: Seppo Honkanen, Goery Genty, Jukka Jurvelin, Jukka Maalampi, Jari Turunen, Jarkko J. Saarinen, Ritva Serimaa, Heli Jantunen, Tuija Pulkkinen (Eds.), Physics Days 2012,The 46th annual meeting of the Finnish Physical Society, 200, Suomen Fyysikkoseura, 2012.
• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip. In: Youssef Hamadi, Marc Schoenauer (Eds.), Learning and Intelligent OptimizatioN Conference (LION 6), Lecture Notes in Computer Science, 307–322, Springer Berlin Heidelberg, 2012.
• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, tk-SA: Accelerated Simulated Annealing Algorithm for Application Mapping on Networks-on-Chip. In: Terry Soule (Ed.), Genetic and Evolutionary Computation Conference (GECCO 2012), 1191–1198, ACM, 2012.
• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, Tree-Model Based Contention-Aware Task Mapping on Many-Core Network-on-Chips. In: Bo Yang, Liang Guang, Tero Säntti, Juha Plosila (Eds.), The 3rd International Conference on Information Science and Engineering (ICISE2011), 731-736, IEEE, 2011.
• Tero Säntti, Joonas Tyystjärvi, Juha Plosila, An Improved Hardware Acceleration Scheme for Java Method Calls. In: Norchip 2010, 2010.
• Joonas Tyystjärvi, Tero Säntti, Juha Plosila, Parallel Performance Evaluation of a Multicore Java Co-Processor System. In: DATE 2010 Workshop "Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications", 2010.
• Joonas Tyystjärvi, Tero Säntti, Juha Plosila, Heap Access Optimizations for a Hardware-Accelerated Java Virtual Machine. In: 2010 International Symposium on System-on-Chip, 2010.
• Joonas Tyystjärvi, Tero Säntti, Juha Plosila, Efficient Bytecode Optimizations for a Multicore Java Co-Processor System. In: 2010 12th Biennial Baltic Electronics Conference (BEC2010), 2010.
• Bo Yang, Liang Guang, Tero Säntti, Juha Plosila, A Dynamic Fault-Tolerant Remapping Algorithm Based on Tree-Model of Network-on-Chip. In: Workshop on Designing for Embedded Parallel Computing Platforms in Design Automation and Test Europe Conference (DATE), 26, 2010.
• Bo Yang, Liang Guang, Thomas Canhao Xu, Tero Säntti, Juha Plosila, Multi-Application Mapping Algorithm for Network-on-Chip Platforms. In: 2010 IEEE 26th Convention of Electrical and Electronics Engineers in Israel (IEEEI), , 540 - 544, 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel, 2010.
• Bo Yang, Liang Guang, Thomas Canhao Xu, Alexander Wei Yin, Tero Säntti, Juha Plosila, Multi-Application Multi-Step Mapping Method for Many-Core Network-on-Chips Platforms. In: NORCHIP, 2010, 1 -6, 2010.
• Bo Yang, Thomas Canhao Xu, Tero Säntti, Juha Plosila, Tree-Model Based Mapping for Energy-Efficient and Low-Latency Network-on-Chip. In: 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS),, 2010.
• Joonas Tyystjärvi, Tero Säntti, Juha Plosila, Efficient Execution of Switch Instructions on a Multicore Java Co-Processor System. In: IEEE TECHPOS 2009, 2009.
• Tero Säntti, Joonas Tyystjärvi, Juha Plosila, A Novel Hardware Acceleration Scheme for Java Method Calls. In: ISCAS 2008, 2008.
• Joonas Tyystjärvi, Tero Säntti, Juha Plosila, Instruction Set Enhancements for High-Performance Multicore Execution on the REALJava Platform. In: NORCHIP 2008, 2008.
• Tero Säntti, Joonas Tyystjärvi, Juha Plosila, FPGA Prototype of the REALJava Co-Processor. In: 2007 International Symposium on System-on-Chip, 2007.
• Johanna Tuominen, Tero Säntti, Juha Plosila, Comparative Study of Synthesis for Asynchronous and Synchronous Cache Controllers. In: Proceedings of the 24th IEEE Norchip Conference, 20-21 November 2006, Linköping, Sweden, 11-14, 2006.
• Tero Säntti, Juha Plosila, Architecture for an Advanced Java Co-Processor. In: International Symposium on Signals, Circuits & Systems, ISSCS 2005, 2005.
• Tero Säntti, Juha Plosila, Instruction Folding for an Asynchronous Java Co-Processor. In: 2005 International Symposium of System-on-Chip, 18-21, 2005.
• Tero Säntti, Juha Plosila, Real Time Flow Control for an Advanced Java Co-Processor . In: Proceeding of IEEE 23rd Norchip Conference , 20-23, 2005.
• Johanna Tuominen, Tero Säntti, Juha Plosila, Towards a Formal Power Estimation Framework for Hardware Systems. In: 2005 International Symposium on System-on-Chip, 96-99, 2005.
• Tero Säntti, Juha Plosila, Communication Scheme for an Advanced Java Co-Processor. In: Proceedings of IEEE Norchip 2004, 2004.
• Tero Nurmi, Li-Rong Zheng, Axel Jantsch, Tero Säntti, Jouni Isoaho, Jari Nurmi, Hannu Tenhunen, Physical Performance Modeling for Platform-Based SoC Design. In: 4th European Workshop on Microelectronics Education (EWME 2002), 2002.
• Tero Säntti, Jouni Isoaho, Modified SRCMOS Cell for High-Throughput Wave-Pipelined Arithmetic Units. In: Proceedings of the IEEE International Symposium on Circuit and Systems, ISCAS, 2001.

Chapters in edited books (1):

• Tero Säntti, Joonas Tyystjärvi, Juha Plosila, Java Co-Processor for Embedded Systems. In: Jari Nurmi (Ed.), Processor Design - System-On-Chip Computing for ASICs and FPGAs, 287–308, Springer, 2007.

Ph.D. thesis (1):

• Tero Säntti, A Co-Processor Approach for Efficient Java Execution in Embedded Systems. TUCS Dissertations 108. Turku Centre for Computer Science, 2008.

Technical reports (4):

• Johanna Tuominen, Tero Säntti, Juha Plosila, Feasibility Report on Asynchronous Synthesis. TUCS Technical Reports 765, Turku Centre for Computer Science, 2006.
• Tero Säntti, Juha Plosila, Instruction Folding and Real Time Flow Control for a Java Execution Unit. TUCS Technical Reports 707, Turku Centre for Computer Science, 2005.
• Tero Säntti, Juha Plosila, Internal Structure of an Enhanced Java Execution Engine. TUCS Technical Reports 665, Turku Centre for Computer Science, 2005.
• Johanna Tuominen, Tero Säntti, Juha Plosila, Towards a Formal Power Estimation Framework. TUCS Technical Reports 672, Turku Centre for Computer Science, 2005.